Contact resistance is one of the device characteristics of semiconductor device performance for complementary metal oxide semiconductor (CMOS) technology, especially in FinFet devices. Larger epitaxial growth structure is desirable for decreased resistance and increased direct flow of current. In order to control the epitaxial growth process, an unmerged scheme is used, which limits the height of epitaxial growth structure. Achieving CMOS devices with taller fins also creates problems with epitaxial growth structure. Middle of line trench silicide reactive ion etch process is a key process device performance. However, current 14 nm process of record shows contact gauging effect in epitaxial substrate to significantly degrade series resistance. Therefore, it may be desirable to develop methods for achieving a more uniform and merged epitaxial growth.